منابع مشابه
Multiplierless, Folded 9/7- 5/3 Wavelet VLSI Architecture
This paper proposes a multiplierless VLSI architecture for the famous 9/7 wavelet filters. The novelty of this architecture is the possibility to compute the 5/3 wavelet results into the 9/7 data-path with a reduced number of adders compared to other solutions. The multiplierless architecture has been characterized in terms of performance through simulations into a JPEG2000 environment and comp...
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ژورنال
عنوان ژورنال: The Journal of the Institute of Television Engineers of Japan
سال: 1985
ISSN: 0386-6831,1884-9652
DOI: 10.3169/itej1978.39.98